Senior Formal Verification Engineer
Munich, Bavaria-Bayern, Germany
Hardware
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products powered by Apple Silicon. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product. Do you have experience leading a Media IP design verification effort collaborating with design? Are you passionate about changing the world? We have a critical impact on getting high quality functional products to millions of customers quickly and we are hiring all levels from junior to senior roles.
Key Qualifications
- Outstanding team leading and communication skills and experience working with design and verification teams to identify FV candidates, develop test plans and perform data-centric verification closure.
- Hands on experience with VLSI and digital logic design and verification techniques
- Advanced knowledge of Video and Image Processing or complex DMA designs
- Developed formal property proofs on industrial strength designs and architectures
- Confirmed understanding of formal verification technologies/abstraction techniques
- Knowledge and experience in interpreting hardware specifications and using temporal logic assertion-based languages such as SVA or PSL
- Experience in using EDA formal tools and tool development experience is a plus
- Proficiency in any scripting language with excellent debugging skills
- Extraordinary teammate with excellent interpersonal skills
- Passionate about developing world-class/innovative formal verification solutions
Description
As a Media Formal Verification (FV) Lead you’ll be responsible for defining the FV strategy of one or more complex IPs strategic in Apple’s products, such as: Neural Engine, Video and Streaming Codecs, Image Sensor Processor, Display Engine, or Camera Interface.
These IPs offer challenging verification problems and require creative solutions to manage complexity. You’ll both own FV TBs on key units and guide FV engineers to overcome challenges in their TBs. In this manner, you’ll often exercise advanced FV techniques such as:
— divide and conquer with assume-guarantee reasoning
— design mutations
— initial state abstractions
— property decomposition
— bug hunting
In this high visibility role, you’ll also collaborate with design, DV and architecture teams to:
— influence design decisions to enable FV efficiency and increase quality
— create and implement short and long term FV strategies
— identify FV targets
— create and review test plans
Education & Experience
BS / MS / Ph.D in EE or CS is required.
Additional Requirements
- Fluency in English is a must