Senior RF Foundry Interface & Design Enablement Engineer

Munich, Bavaria-Bayern, Germany


Role Number: 200104022
Can you influence, connect, get results and communicate effectively? Do you want to utilize your engineering background to make big things happen? Can you deliver on a predictable and dynamic schedule? As part of our Silicon Engineering group, you will take imaginative and revolutionary ideas and determine how to turn them into reality. You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Join us, and you will help design products that bring to our customers experiences they’ve never before envisioned. You will work at an exciting silicon design group that is responsible for crafting state-of-the-art ASICs. We have an extraordinary opportunity for Technology Engineers. We are looking for a motivated engineer to fill a full-time position for RF technology PDK QA & Design Enablement.

Key Qualifications

  • We are looking for applicants with at least 5 years of experience in semiconductor technology R&D.
  • Deep experience working with advanced CMOS node PDKs and collateral such as Spice models, DRM/DRC, LVS, RC tech files as well as Std cells and memory compilers.
  • Design experience in advanced CMOS process, including strengths in transistor level circuit design.
  • Excellent data analytical, problem solving and communication skills are required.
  • People management skills and managerial experience is helpful.
  • Prior experience in success of delivering new designs to production under very ambitious schedules.
  • Self-motivated and schedule oriented is a requirement.


Imagine yourself at the center of our design efforts, collaborating with design teams and providing technology support, with a critical impact on getting functional products to millions of customers quickly. • Your main responsibilities on this role will be: • QA of Foundry PDK/ models with emphasis on RF device metrics. • Support local design teams on PDK components such as LVS, DRM/DRC, Spice models and tech files. • Drive design methodology, including DFM and DFY activities with other teams. • Handle and mitigate technology risks for projects. • Drive thorough investigation, root cause, and solutions to technology issues and its impact on circuit design. • Engage parties in decision-making and work towards timely closure and thorough follow-through.

Education & Experience

• BSEE / MSEE, PhD preferred. Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.

Additional Requirements