CAD Engineer – Analog/RF Simulation Flow & Methodology
Munich, Bavaria-Bayern, Germany
As a member of our CAD team, you will architect, develop, maintain and enhance simulation methodology and solutions for our Analog, RF and Mixed-signal designs. The role requires the candidate to work with different technology nodes and provide flows/methodologies for the different tool sets. Working in a small CAD team, you will be interfacing with the analog, mixed-signal, and RF circuit design teams. Work will also involve partnering with layout design, technology, and 3rd party EDA tool vendors to drive and coordinate effort of developing and validating simulation flows, enhancing custom design environment, validating checks and results analysis.
- Typically requires 7+years of industry experience in circuit simulations and/or related CAD/automation support areas involving various technology nodes and tapeout.
- Proficiency with spice simulators, including Spectre/APS/XPS, SpectreRF, AFS (BDA), Hspice, HspiceRF, NCSim, XA, Hsim, FineSim, etc.
- Strong ability to solve simulation accuracy, speed and capacity issues.
- Experience in evaluating simulation and environment related CAD tool/product applications, and driving EDA vendors to meet design requirements.
- Understand custom IC designs, and knowledge in extraction.
- Understanding behavioral models for AMS/EF circuits, experience in Verilog- AMS. Knowledge of PDK and spice models qualification.
- Very efficient programming skills in languages like: SKILL, Ocean, Perl, Python, TCL, Shell, etc.
- Ability to provide automations for rapid and dynamic design needs.
- Knowledge in Perforce and/or regressions is a plus.
- Knowledge in Virtuoso Schematic Editor, Virtuoso Analog Design Environment (ADE-L/XL/GXL), Virtuoso Layout Editor, Constraints, pcells is a plus.
- Candidate should be a team player with good written and verbal communication skills, and able to work with cross-functional teams.
- Deep understanding of various simulators is essential, along with extensive background supporting Spice, Fast-Spice, AMS, co-simulation in transistor level circuit simulation domains, including but not limited to:- DC/Transient/Noise/PSS, Cross corner PVT, Aging/Reliablity analysis, MonteCarlo simulations - Deep understanding of Virtuoso ADE (Analog Design Environment L/XL/GXL) and its sub-set tools including OCEAN, Corners, Sweeps, MonteCarlo and Optimization is needed - Knowledge including customization of Virtuoso ADE Menus, Model Skew customization, Netlist format variations, Schematic/Layout CDF callbacks is also desirable - Familiarity with ADE Results access, Data Analysis, Waveform plotting, including OCEAN scripting customization with different simulators is needed - Back-end knowledge on Virtuoso XL, constraints, modgen, layout, pcells, LVS, DRC, and extraction is an added plus.
Education & Experience
MS/ PhD preferred in a technical discipline.
- Apple is an equal opportunity employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.