CAD Engineer - PDV & Extraction

Munich, Bavaria-Bayern, Germany
Hardware

Summary

Posted:
Role Number:200170831
Will you help us design future generations of ground-breaking Apple products? The Silicon Engineering team in Munich is seeking a CAD Engineer with a great foundation in PDV and Extraction and a real passion for creating new technologies. At Apple, we work every day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and innovative CAD Engineer. As a member of our multifaceted group, you will have the rare and great opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every single day. You will be responsible for supporting and maintaining the Physical Design Verification tools and flows for mixed signal CMOS devices, partnering closely with Design and Technology teams, EDA vendors and CAD colleagues. You will bring along an in-depth knowledge of CAD/EDA tools to support design engineers with their daily issues. You will also have a deep understanding of design rule checks (DRC) and layout versus schematic (LVS) runsets, parasitic extraction, dummy metal fill generation and Design for Manufacturability (DFM) rules in order to assist layout engineers, debug issues and/or modify run decks. Your good knowledge of CMOS, bipolar transistor design and analog circuit theory will definitely be crucial in this role.

Key Qualifications

  • Typically requires 5+ years of proven industry experience in Silicon chip design flows
  • Strong experience with industry standard tools including Cadence Virtuoso, Mentor Calibre, StarRC and QRC
  • Physical Design Verification and parasitic extraction support and debug experience
  • Efficient scripting capabilities in SKILL, Perl, TCL, C, Makefile
  • Expert in Calibre runset programming for DRC/LVS/ERC rules including in advanced nodes.
  • Deep understanding in Silicon technology and experience with flow development
  • Excellent interpersonal and analytical skills with the ability to work independently
  • Highly motivated, excellent teammate with strong product and customer focus

Description

- Work with the design and physical design teams to facilitate the physical design verification chip design processes - Develop, maintain and improve flows for all aspects of physical design verification and extraction - Collaborate closely with CAD and different technology teams for flow bring up, flow validation and support - Code custom PDV rule decks such as Electrical rule checks (ERC) and Programmable ERCs - Collaborate with tool vendor and foundries for PDK performance enhancements

Education & Experience

- MSc/BSc in Electrical Engineering required or equivalent, alternatively equivalent experience.

Additional Requirements

  • Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.