Design for Test (DFT) Engineer (M, F, D)
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As a DFT engineer we are involved with the complete DFT solution for a design project, you will have responsibilities spanning all aspects of semiconductor design:
Developing and implementing DFT architecture
Implementing DFT infrastructure
Working with the DV team to verify DFT implementations and implement ECOs
Generating structural test vectors and analyzing and improving coverage
Working with designers on STA, physical, power and logical issues
Working with test engineers to bring up test vectors on silicon
Running schedules and supporting multi-functional engineering efforts
- BS/MS/PhD in electrical engineering, computer science, or a related field
- Understanding and expressing complex thoughts in English
- Knowledge about industrial standards and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time.
- Knowledge of Verilog and/or VHDL, and experience with simulators and waveform debugging tools.
- Knowledge of industry standards for DFT and design tools.
- Experience developing DFT specifications and driving DFT architecture and methods for designs.
- Proven Understanding of design verification (DV) methodologies for validating DFT implementation in simulation pre-silicon.
- Experience in debugging Compressed ATPG patterns, MBIST, and JTAG/1500 related issues.
- Experience with STA constraints development and analysis for DFT modes and SDF simulations.
- Ability to conduct experiments during silicon debug, gathering and analyzing data; and use scripting to support efficient handling of ATE data.