RTL Design Engineer - Media IP - Grad

Cambridge, Cambridgeshire, United Kingdom


Weekly Hours: 35
Role Number:200160011
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. The RTL Design team at the Cambridge Design Centre works on complex, large-scale media IPs. We partner with our architecture, functional verification, and physical design teams to deliver high quality media IP in order to meet performance, feature, timing, area, and power goals.

Key Qualifications

  • Undergraduate in the last year or postgraduate of a CE, EE, CS, or related field
  • Decent understanding of modern power, performance and area (PPA) efficient design techniques
  • A good knowledge of Synthesizable RTL Design in Verilog/VHDL and its realisation in logic cell/gates
  • Familiarity with logic optimisation, synthesis, timing and performance analysis
  • Familiarity with logic simulation and debug environments as well as formal verification
  • A decent understanding of one or more of: high-speed Integer/floating-point numeric units, 2D digital filters, Image/video signal processors (ISP), Camera IP, GPU, CNN, CV, crossbar fabrics, controller blocks (DMA, Cache controllers etc..) and bus-interface subsystems
  • Nice to have some familiarity with scripting and programming experience using several of the following: Perl/Python, C/C++, and TCL/Bash
  • Understanding of media IPs is desirable but not mandatory
  • Ability to work well in a team and be productive under tight schedules.
  • Excellent communications skills, self-motivated and well-organised


You will work closely with other designers to refine media IP micro-architectural specifications as well as collaborate with the architecture, physical design and verification teams to identify potential issues as early as possible. You will implement the micro-architecture, targeting cutting-edge technology nodes, balancing energy efficiency, performance and area constraints with project schedule, maintainability and coding elegance. You will review synthesis and power reports, root-cause and resolve timing and power issues and ensure maximal QoR throughout your design. As your design approaches functional completion, your task will be to work closely with the verification team to ensure the design behaves as intended and is tested thoroughly. At this point, there will be ongoing collaboration with the physical design team to help with any adjustments necessary to produce an optimal layout of the design, in its context. Once your design is integrated into the system as a whole, you will be simulating and debugging issues both within and around your design.

Education & Experience

Currently enrolled in your final year of your BSc/MSc/BEng/MEng/PhD in related field from a reputable university.

Additional Requirements

  • Some international travel required.
  • We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.