Analog Mixed Signal Design Verification Engineer

Swindon, Wiltshire, United Kingdom


Role Number:200335149
At Apple, we work every single day to craft products that enrich people's lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for an outstanding Analog Mixed Signal Verification Engineer in our Swindon office. As a member of our dynamic group, you will have the great opportunity to craft upcoming products that will delight and encourage millions of Apple's customers every day! We are looking for an Analog Mixed Signal Verification Engineer who will enable us to verify our next generation of PMUs, in close collaboration with the design teams. The responsibilities include contributing to the top level verification of our PMUs. A number of IP specific features as well as interaction between IPs will also be part of the expected verification scope.

Key Qualifications

  • Ability to verify analog/mixed-signal designs in a collaborative team environment.
  • Analog and/or digital design experience to aid in identifying failure mechanisms, work through first order debug, understanding analog/digital behavior through verification results.
  • Experience with hardware descriptive languages and practicalities of analog behavioral models: Verilog, System-Verilog, and/or Verilog-AMS code
  • Ability to write test plans, present results, and communicate clearly with multi-functional teams.
  • Comfortable and proficient in technical leadership roles, drive for results through motivating others, guiding, and setting high standards.
  • Understanding of both power management and related auxiliary circuitry: switching converters, linear converters, reference circuitry, band-gaps, data converters, and clock generators
  • Familiar with verification methodologies and tools: simulators, waveform viewers, execution automation, coverage collection, experience developing scalable and portable test cases
  • A passion for coding and automation that includes scripting or programming languages. These include, but are not limited to, TCL, Python, PERL, and/or Skill.
  • Knowledge of analog concurrent assertion and static analyses checks is a plus
  • English Language skills are required


In this role, you will be responsible for ensuring high quality silicon for IC chips and IPs. Daily work involves verification of mixed signal IC designs using a combination of analog circuits and RTL in the same simulation, working in multi-functional teams across Apple, to ensure product quality. RESPONSIBILITIES INCLUDE: - Pre-silicon verification from early discussions with architects, reviewing specifications, writing verification plans, running simulations, triaging issues, and reviewing results with the team. - Collaborate with Analog and Digital teams on the definition of a verification strategy and execution of the verification plan based on IC specifications. - Completion of verification plans from beginning to end: test bench and environment bring-up, regressions, failure debug, signoff and tape-out. - Develop verification test benches, and pioneering methodologies suitable for the IP, ensuring scalability and portability. - Develop verification environment, including stimuli, checkers, assertions, trackers, and coverage. - Analyze and model analog behavior (Verilog-AMS modeling). - Guide design teams for best practices in top level schematics. Have collaborative approach to communicate status and results to multiple subject areas.

Education & Experience

BS/MS/PhD in Electrical Engineering, Computer Engineering or equivalent is required

Additional Requirements

  • Some international travel required.
  • Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.