SoC Power Model Architect

Herzliya, Israel
Hardware

Summary

Posted: Oct 22, 2018
Role Number: 200000389
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product Generate and drive new ideas in micro-architecture and/or circuits to reduce CPU power across the dynamic range. Drive budgeting, measurement and analysis of overall CPU power for many use cases of interest Will work extensively with Micro-architects & Physical designers to study power reduction opportunities Modeling of power for Newer CPU architectures The main responsibility of this role is to drive the SOC power modeling and optimization for very power efficient products. Working with architects to determine the interesting use-cases to simulate; providing power projection for the future projects based on analysis. Creating test cases within the design verification team's environment. Working with logic teams to determine the correct functionality or improve functionality for power reduction. Work with Architecture and design team, model the SOC power for use cases. Develop IP power model on new architecture design, providing power data for performance/power/area trade-offs. Understand interactions of the product at the software and system level that impact power. Work multi-functional teams on improving the power mo

Key Qualifications

  • Experience in SOC power simulation and modeling, hardware power simulation and analysis flow.
  • Familiarity with ASIC power analysis and optimization
  • Familiarity with Verilog and System Verilog.
  • Familiarity with script writing in Python, Perl or Tcl.
  • Experience with SOC power modeling, low power design and power optimization
  • Familiarity the power impact at architecture, logic design, and circuit levels
  • Familiarity with SOC design flow and methodology.
  • Familiarity with power simulation and power optimization.
  • Strong interpersonal skills are a pre-requisite as you will collaborate with a lot of different groups
  • Familiarity the multimedia data processing is a plus
  • Silicon power measurement experience is a plus

Description

In this highly visible role, you will be responsible for SOC power simulation and power modeling, SOC use case power analysis, and drive the future SOC power optimization.

Education & Experience

BS.c in EE / MS.c in EE or Computer Science/ Electrical Engineering required.

Additional Requirements