SoC Power Verification Engineer
The main responsibility of this role is to drive the SOC power optimization and verification for very power efficient products. Working with architects to determine the power sensitive use-cases to simulate. Ability to build power aware tests and modify functional tests to verify power targets. Building test cases within the design verification team's environment. Working with logic teams to determine the correct functionality or enhance functionality for power reduction. Work with Performance Architects to specify the power use cases scenarios and how to apply and verify them in design verification environment. Craft a power-aware, power feature verification plan to be used by design verification team, with ability to debug and modify the tests to meet power coverage plan. Define coverage and success criteria for power verification tests.
- 3+ years experience in SOC power simulation and modeling, hardware power simulation and analysis flow.
- Familiarity with Verilog and System Verilog.
- Familiarity with Design Verification flows
- Familiarity with SOC design flow and methodology.
- Familiarity with power simulation and power optimization.
- Strong interpersonal skills are a pre-requisite as you will collaborate with a lot of diverse groups
- Familiarity with script writing in Python, Perl or Tcl is a plus.
- Familiarity the multimedia data processing is a plus
- Familiarity with ASIC power analysis and optimization is a plus.
- Silicon power measurement experience is a plus.
In this role you will be responsible for SOC power simulation and power verification, SOC use case power analysis, and drive the future SOC power optimization.
Education & Experience
BS.c in EE/ MS.c in EE or Computer Science / Electrical Engineering required.