Pixel IP - Front-End and Integration lead - Herzliya
Will you help us design future generations of revolutionary Apple products? Are you an engineer with a strong foundation and real passion for building new technologies? Imagine what you could do here. At Apple, new ideas have a way of becoming excellent products, services, and customer experiences very quickly. Every single day, people do an amazing things. Do you want to impact billions of users by developing extraordinary products with a prime focus on the accuracy and performance of the product? You will become part of a hands-on development team that furthers engineering creativity and innovation. Dynamic, inspiring people and innovative technologies are the norms here. Dynamic, smart people and inspiring, innovative technologies are the norms here. Will you join us in crafting solutions that do not yet exist?
- The position requires 5-10 years proven experience with ASIC flows.
- Experience with FE design tools and methodologies such as: Lint, Synthesis, Logic Equivalence, Clock/reset cross domain verification.
- Experience in definition and implementation of low power design (UPF) - advantage.
- Experience with multi-clock and multi-power domain designs.
- Experience with ECO implementation, both functional and timing closure.
- Ability to develop scripts to facilitate ad-hoc design tasks. Quick learning of flows and methods.
- Familiarity with DFT.
- Good interpersonal skills and ability to work cooperatively with other teams.
In this highly visible role, you will be responsible for top-level design development and FE design flows for RTL and Netlist. You will be working closely with architecture, verification, CAD, and physical design teams. You will work with the design team on design methodologies, and work towards execution.
Education & Experience
B.Sc /M.Sc in Electrical or Computer Engineering from lead universities