Verification Team Leader
Will you help us design future generations of revolutionary Apple products?Are you an engineer with a strong foundation and real passion for building new technologies? Imagine what you could do here. At Apple, new ideas have a way of becoming outstanding products, services, and customer experiences very quickly. Every single day, people do amazing things at Apple. Do you want to impact billions of users by developing extraordinary products with a prime focus on accuracy and performance of the product? You will become part of a hands-on development team that furthers engineering excellence, creativity and innovation. Dynamic, inspiring people and innovative technologies are the norm here. We want you to join us if you are an innovative engineer with the dream to research and develop solutions that do not yet exist. As a Verification team leader, the individual will lead team collaborating with the engineering design team and developing the verification environment for new silicon developments. This is a technical, hands-on management role.
- Lead the verification team, including taking responsibility for hiring, resource planning, scheduling, communication with upper management and overall verification team execution.
- Take responsibility for performance management of individual team members including goals management, performance evaluations, promotions and disciplinary actions as required.
- Take responsibility for all aspects of verification methodology employed by the team and ensure the application of uniform standards and adoption of best practices.
- Drive design verification flows and methodologies improvements.
- Work closely with the design team to review specifications, understand chip architecture, develop tests & coverage plans, define methodology & test benches.
- Define and track DV metrics to deliver high quality design in both module level and system level.
Typically requires at least 10+ years of industry experience. Prior verification team management experience is required. Advanced knowledge of ASIC verification flow including simulation, testbench development and regression is a must. Experience with low-power simulation, formal or emulation/acceleration is a plus. Experience with industry standard verification methodologies and languages (e/SV and VMM/OVM/UVM) and understanding of constrained random verification process, functional coverage, and code coverage is a must. Should be a great teammate with excellent interpersonal skills and the desire to take on diverse challenges.
Education & Experience
B.Sc degree or higher in EE/CS/CE from a leading university
- 10 years of industry experience in a verification role, out of which at least 3 years in a management role