CAD Manager Engineer – Place and Rout Physical Design
Technologies group, you’ll help design and validate our next-generation, high-performance, power-efficient system-on-chip (SoC) designs. You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Place and Rout CAD manager is in charge of covering all PD CAD flows (netlist->layout) in advanced technologies and will be working closely with PD teams and EDA vendors. This position involves in-depth understanding of the PD design flow from Netlist to GDS. You are encouraged to possess detailed understanding of design partitioning, floor planning, place and route and clock tree synthesis required for establishing flows and methodology.
- experience (5+ years) with complete backend (RTL2GDSII) design flow: synthesis, floor planning, power grid planning, CTS, placement, route, post route optimization, extraction, static timing, physical verification, EM-IR and ECO flows.
- Proven experience in using EDA tools like Synopsys (Primetime, ICC, ICC2), Mentor (Calibre), and Cadence (Encounter/Innovus, ETS/Tempus, Virtuoso, Conformal
- Additional experience with tech enablement, synthesis, static timing analysis, formal verification and custom layout tools (Virtuoso, VXL)
- Design: Layout design background and experience (at least a year)
- Design/CAD: Understanding of VLSI Flow from Specification to Silicon.
- Management of medium to large BE (CAD and/or execution) teams (5+ engineers) for at least 5 years
- Management: Proven abilities in driving cross site tasks - must
- Expert knowledge of programming and scripting language is a plus.
- Must have excellent communication and problem solving skills.
- PROGRAMMING SKILLS:
- Scripting skills to debug flow related issues and make improvements as appropriate.
- Must be proficient in PERL, Tcl/Tkl, and shell scripting languages.
As a Physical Design manager, you will take part in managing flow development and in close day to day work with the physical design engineers, to make our physical design work better and projects execution successful. You will collaborate with PD management/teams/Vendor teams for flow bring up and validation as well as support issues related to the flow and tools You will be working closely with the implementation team during the entire chip design cycle to drive signoff closure for tapeout
Education & Experience
BSc/ MSc in Electrical Engineering