Verification and Design Engineer
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it. The Pixel IP Design/DV group works on complex, large-scale media IPs. We partner with our architecture, and Physical Design teams to deliver high quality media IP in order to meet performance, feature, timing, area, and power goals The position is verification centric while allowing you to develop design skills..
- +3 years experience in SoC Verification, media IP Verification experience is a plus
- You will need to have advanced knowledge of SoC/Media IP Architecture/Design & in-depth knowledge of Verification flow.
- Deep understanding and shown experience in advanced Verification process, including dynamic, coverage based and formal methods.
- Familiarity with Verification environments, UVM, SystemVerilog – an advantage.
- Knowledge of formal, hardware acceleration – an advantage.
- Scripting and programming experience using several of the following: Perl, e, Verilog, SystemVerilog, C, C++, and TCL
- Previous IP Design experience is a plus
- Previous data path Design and deriving uArch from architectural requirements are pluses
You will develop verification test plans, tools, test benches, protocol monitors, and high-coverage stimulus vectors. Apply deep system level understanding to find system architecture bugs, verifying the DUT at multiple levels - from block level to the entire IP, with emphasis on power (NLP) and performance. You will work closely with the architecture teams to ensure timely delivery of quality designs. For the Design side, you will work closely with other designers to define media IP micro-architectural specifications as well as collaborate with the Architecture, Physical Design and Verification teams to identify potential issues as early as possible. You will work on all development stages, from RTL implementation, thru optimizing the Physical side of the Design (timing, power, maximal QoR throughput), to closely collaborating with the Physical Design and DV teams, and DV teams, making sure the Design’s quality and debugging issues.
Education & Experience
B.Sc / M.Sc in Electrical Engineering or Computer Engineering from leading universities
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