AMS Digital Design Intern - "Static Timing Analysis"

Munich, Bavaria-Bayern, Germany


Role Number:200542553
Imagine what you could do here. At Apple, new insights have a way of becoming phenomenal products very quickly. Do you want to bring passion and dedication to your job? There's no telling what you could accomplish at Apple. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices — we continue to strengthen our commitment to leave the world better than we found it. By now the industry is accustomed to Apple taping out the SoCs for our various products at a thorough pace. To achieve this, our world-class design processes are driven by our top-notch Digital Design engineers. Are you ready to join some of the world's leading engineers, and help us deliver the next generation of ground-breaking Apple products? Join Us!


As an intern in the design team, you will assist us in implementing state of the art mixed signal IPs that meet our quality goals (i.e. performance, area, and power). We will provide you with the mentorship and the opportunity to collaborate with experienced design engineers, as well as work alongside our flow experts and physical design teams that are responsible for our products. You will contribute to Apple’s internal development environment and help us to work more efficiently. We are looking for a dedicated student who loves challenges, brings the ability to learn and wants to become a part of our International team.

Minimum Qualifications

Key Qualifications

  • English language fluency is required
  • Available for 9-12 months
  • Strong analytical and problem solving skills
  • Coursework focusing on digital design and design automation
  • Phenomenal interpersonal skills, and like the rest of us here at Apple, you love working in an open and multi-cultural environment
  • Basic understanding of logic synthesis and static timing analysis
  • Scripting and programming knowledge with one or more of the following: Python, Perl, TCL
  • High Level Description Language (HDL) knowledge , like SystemVerilog, Verilog and/or VHDL - an advantage

Preferred Qualifications

Education & Experience

Currently enrolled in your penultimate year of studies in a CE, EE, or related field (Bachelor's, Master's or PhD). - This position can be carried out as a full-time internship or a part-time working student role. - You will need to be available for 9 - 12 months.

Additional Requirements