Analog Mixed Signal Verification Engineer

Munich, Bavaria-Bayern, Germany


Role Number:200274107
At Apple, we work every day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and creative Analog-Mixed-Signal Design Verification Engineer in the Power Management Team! Our team is located in the south of Munich and part of the Apple wide Power Management organisation collaborating with sites across the world.

Key Qualifications

  • Experience in analog and digital simulation, i.e. electrical and logic simulation
  • Deep knowledge of Verilog-AMS and System-Verilog test-bench language
  • Hands-on experience with analog-mixed-signal verification environments
  • A good understanding of Assertion Based Verification
  • Basic design background in support of verification results analysis
  • Knowledge of verification automation concepts and scripting languages (TCL, Python)
  • Standout colleague with excellent interpersonal skills able to collaborate with analog and digital design teams as well as system teams
  • Background in power management is a plus


Power management is by nature a mix of analog and digital design. AMS-DV engineers are in the central position to bring our state of the art power management solutions to life and be compatible with all partners along the product development cycle from chip definition to product integration! We develop groundbreaking Power Management ICs for all kind of Apple products with special focus on cellular solutions. We as team of chip architects, analog and digital design engineers, mixed-signal and digital verification engineers, and layout and SiVal engineers cover the complete chip development process from concept definition to silicon bring-up in the local labs. Construction of verification environment using leading edge methods Development of test plans covering the specified feature set and related checks and assertions Design verification from interactive test case debugging to automated regression Design debugging and verification automation Collaborating with DV teams targeting optimum verification coverage

Education & Experience

MSc in Electrical Engineering or industrial experience equivalent Recent MSc graduates with outstanding academic results and relevant internship experiences will also be considered

Additional Requirements

  • We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, colour, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.