Wireless Design Verification Engineer (Japan Design Center)
Imagine what you could do here at Apple? Together we could help craft the next generation of the world’s finest devices. New ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your career, and there's no telling what you could accomplish!
Apple's growing wireless silicon development team is responsible for developing the next generation of wireless silicon! In this role you will be responsible for ASIC pre-silicon verification of extremely complex high throughput communication Radio digital controllers. We will develop leading edge testbenches, enhance advanced methodologies, develop verification plans, debug functional tests, and utilize coverage analytics. You will be in the center of the organization impacting and influencing many cross-functional teams.
As a Wireless Verification Engineer, you will be at the core of our wireless product's success, bridging domains, driving collaborations, and developing verification solutions to ensure excellent products. In this role you will take on verification of controllers, blocks, subsystems, protocols, low power capabilities, and SOC / integration frameworks. We will leverage and develop environments, infrastructures, create scenarios, and analyze metrics. Responsibilities include:
- Develop feature or subsystem test planning, bring up, through feature closure.
- Develop test bench environment, infrastructure, methodology, and flow automation development.
- Cross functional partnership, driving verification requirement and deliverable.
- Develop constrained randomization scenario development and debug.
- Develop regression issue tracking and closure.
- BS/MS required
- Minimum of 5 years of relevant experience.
- Knowledge of ASIC verification flows with SystemVerilog (UVM is a plus)
- Experience developing testbenches from scratch, bringing up designs in simulation
- Experience with checker implementation, constrained random testing, coverage closure, and RTL simulations.
- Experience with a scripting language such as Python or similar is valued.
- Experience in formal verification (assertion-based verification) is a plus.