CPU Floating-Point Execution RTL Architect
Santa Clara Valley (Cupertino), California, United States
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power the iPhone and iPad product categories. We are looking for an experienced engineer for Floating-Point and Integer Execution Unit RTL development.
- You should possess 5+ years of CPU RTL and architecture experience.
- - Knowledge of Floating-Point Standards (such as IEEE 754), and an in-depth understanding of hardware algorithms for implementing Arithmetic/Numeric data paths (such as Floating-Point Adders, Multipliers, Divide/Sqrt units, etc).
- - Knowledge of Verilog. Experience with simulators and waveform debugging tools.
- - Knowledge of logic design principles along with timing and power implications.
As a Floating-Point and Integer Unit architect you will own or participate in the following - RTL ownership: Development of RTL for Integer and Floating-Point Execution Pipelines, and Instruction Scheduling and Retirement, of Integer/Floating-Point/Vector instructions, meeting power, performance, area and timing targets for a high-performance CPU. - Microarchitecture development and specification: From early high-level architectural exploration, through microarchitectural research and arriving at a detailed specification. - Performance exploration: Explore high performance strategies and work with a verification team to validate that the RTL design meets targeted performance. - Design delivery. Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and power.
Education & Experience