Memory Package Architect

Santa Clara Valley (Cupertino), California, United States


Posted: Nov 26, 2018
Role Number: 200000988
Do you love crafting new technical innovations that change every day lives? That's what we do at Apple every single day, and if you are a highly motivated, talented and innovative DRAM packaging Engineer, then we would love to have the opportunity to have you as part of the team.

Key Qualifications

  • Extensive experience in Semiconductor Packaging Design
  • Hands on experience in Assembly Process development for Mobile memory / flash NAND
  • Fundamental package materials knowledge and understanding of main materials properties that modulate the package warpage, package stress and strength
  • Expertise in memory device architecture, SIPI, layout, package substrate and assembly process technology, test, and reliability.
  • Excellent engineering analytical skills, with strong engineering physics
  • Strong communication skillset


•You will own the mobile memory package development and integration with the SOC by managing the external memory vendors and close collaboration with the internal development teams •Define the memory package POR (plan of record): Package architecture, technology, process, form factor, layout, material, design rules, thermo-mechanical, signal integrity, power integrity. •Develop next generation memory package architecture and technology roadmap •Direct collaboration with vendors for LPDRAM and NAND qualification •Craft, execute, and analyze Design of Experiments (DOE) for packaging development and sustaining activities •Drive industry with advanced package process, new material, and leading-edge specs

Education & Experience

•MS Degree or PhD in Engineering preferred

Additional Requirements