Analog IP Engineering Program Manager
Santa Clara Valley (Cupertino), California, United States
Apple is looking for design engineering professionals with strong leadership ability to ensure that our Analog/Mixed signal IPs for SoC’s that meet the technical, quality and schedule requirements for Apple products. You will be responsible for multi-functional communication and representation for the groups involved in Apple IP development and SoC IP Integration. You will utilize your project management experience in VLSI Chip Design, ASIC Chip Design, and/or Technology process development.
- Typically requires at least 5+ years experience crafting Analog and Mixed-signal IPs and products.
- Experience working in a dynamic engineering environment and real-time crisis management skills.
- Committed to own/drive project development using well-defined metrics.
- Strong teammate and creative thinker who is able to lead technical teams, multi-functional groups and vendors against plans.
- High tech industry experience with a track record of hands-on product development, program management, project management or engineering management.
- Excellent written and verbal interpersonal skills.
- Advanced knowledge of IP development process, tools/flows and methodologies and life cycle in a SoC.
• Work closely with SoC Integration teams to drive high level achievements for IP development. • Multi-task skills will be key to lead IPs across several projects at a time. • Drive technical work with Apple SoC teams, resolving issues and bug tracking. • Lead weekly meetings with IP consumers to resolve technical issues • Pull together regular project status presentations for executive leadership review. • Drive resolution of technical issues between multi-functional teams: Technology/Library, SoC design, SoC PD, SoC DV and CAD teams. • Convert large amounts of data into a clear story to communicate to partners and organizations at all levels. • Identify risks, develop mitigation strategies and facilitate conflict resolution. • Collaborate with software/hardware teams to lead silicon validation of IPs.
Education & Experience
• MS or BS Degree in technical discipline