Packaging Architect

Santa Clara Valley (Cupertino), California, United States
Hardware

Summary

Posted: Oct 23, 2018
Role Number: 200001083
In this highly visible role, you will be responsible for identifying, architecting, and designing heterogeneous System-In-Package modules. We are seeking passionate and talented individuals who are very innovative, have a track record architecting and designing SIP modules introduced into mass production, and have a good grasp of heterogeneous integration and packaging structures to meet mechanical constraints. In this role you can demonstrate your creativity and capability to bring new products to life.

Key Qualifications

  • Typically requires at least 8+ years experience in System Architecture and Design, Packaging Design, Heterogeneous System Integration, and SIP Module Development.
  • Deep understanding of circuits, schematics, engineering requirements and device specifications.
  • Expertise with Cadence APD/Allegro and Virtuoso for physical design.
  • Knowledge of Signal Integrity and Power Integrity.
  • Strong engineering physics including packaging electrical, electro-magnetic, thermal, and mechanical interactions.
  • Knowledge of packaging structures and mechanical constraints.
  • Ability to thrive working with multi-functional teams and drive initiatives.
  • Excellent critical thinking and problem solving. Willingness to tackle challenges.

Description

•Work with system teams to find opportunities for innovative system integration and align on future requirements. •Develop roadmaps and identify SIP module packaging schemes and constructions to meet future requirements. •Drive design efforts for novel new heterogeneous SIP modules from concept to mass production. Demonstrate creativity to meet design challenges. •Invent new integration and interconnect schemes to solve system level challenges.

Education & Experience

•Bachelors required in Electrical Engineering or Physics and relevant experience within technical discipline. MS or higher degree preferred.

Additional Requirements