PCB/SIP Design Engineer

Santa Clara Valley (Cupertino), California, United States
Hardware

Summary

Posted: Oct 22, 2018
Role Number: 200001172
Do you like to work on groundbreaking technologies that enable amazing new products? Do you have the attention for details and love for excellence to work towards an extraordinary result? We are looking for a talented and passionate IC Packaging Engineer to join our team. In this highly visible role, you will own and drive advanced package selection, new product package structure and configuration optimization. You will be responsible for package/SIP layout, optimization, design verification and taping out.

Key Qualifications

  • 5+ years of experience in the physical design of multi-layer boards (MLBs) or system in package (SIP)
  • Experience in schematic capture and system integration
  • Strong physical understanding of power and signal integrity fundamentals
  • Experience in the physical design of Power Delivery Networks (PDNs) and high-speed signals at PCB level
  • Familiar with Cadence Allegro or SIP for physical design
  • Familiar with Cadence Concept HDL for schematic review
  • Familiar with CAM350 for artwork checking
  • Ability to work and communicate effectively in a multi-functional team
  • Familiar with High Density Interconnect (HDI) PCB and Flip-Chip (FC) BGA package substrate technologies

Description

•Work with multi-functional team to understand system requirements and physical design limitations  •Develop physical design implementations meeting stringent power and signal integrity requirements  •Drive co-optimization of physical design on MLB, SIP, package, and silicon  •Provide implementation guidelines and feedback to silicon, package, and system design groups  •Perform feasibility study, design verification, and sign-off •Resolve PCB design issues with fabrication and manufacturing vendors.  •Participates in the evolution and definition of Apple’s Design For Manufacturing (DFM) guidelines.

Education & Experience

•BS in engineering field required.

Additional Requirements