Mixed-Signal Methodology and Automation Engineer
Santa Clara Valley (Cupertino), California, United States
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices — strengthening our dedication to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple products. Dynamic, smart people and inspiring, innovative technologies are the norm here. Will you join us in crafting solutions that do not yet exist? As a member of Mixed-Signal design team, you will create and support innovative design methodology and customize and automate CAD flows for advanced Mixed-Signal IP designs. The design flows are used by multiple different IPs of multiple projects at multiple sites. Strong knowledge of Synthesis, P&R, Timing, Simulation CAD flows, EDA tools, UPF, algorithm, scripting (TCL/Perl/Python) and Makefiles is a requirement. You will collaborate with RTL, PD and timing design teams, CAD team, and EDA vendors.
- Typically requires 4+ years experience in Synthesis, PNR and timing flows development.
- Understand various aspects of partition level Synthesis, PNR, including floor-planning, timing/power optimization, CTS, routing the UPF
- Understanding and exposure to extraction and timing analysis flows
- Understand hierarchical Synthesis and PNR issues is a key (UPF, power-distribution, multi-voltage design)
- Knowledge and experience of hard IP view set creation and deliverables
- Strong TCL/Perl/Python/Makefile scripting knowledge. Proven track record of managing, and regressing Synthesis, P&R and timing flows.
- We are looking for a self-motivated, dedicated problem solver. Strong interpersonal/communication skills are a requirement.
As a member of the Mixed Signal Methodology team, you will be involved with all aspects of high performance PHY design from RTL to delivery of our final GDSII. Your responsibilities include but are not limited to: Provide innovative solutions to customize and improve quality and efficiency of mixed-signal design. Work with RTL and physical design teams to implement and customize design flows that are optimal for different IPs. Provide documentation, training and new-user-support. Responsible for diagnosis, resolution, regression of reported problems. Generate block/chip level static timing constraints. Develop checks and flows for Hard IP deliveries and for sign-off. Develop and guide development of high performance low power clock networks. Automate flows for timing ECOs, noise, and EM/IR violations. Provide guidelines to fix LVS/DRC violations to other designers. Participate in establishing CAD and physical design methodologies for correct by construction designs. Assist in flow development for chip integration.
Education & Experience
Master's or Ph.D. preferred Electrical Engineering, Computer Engineering or Computer Science