Graphics Verification Engineer

Santa Clara Valley (Cupertino), California, United States


Role Number:200003730
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices. The Graphics Verification Engineer will be responsible for the pre-silicon RTL verification of blocks in low power embedded graphics cores. This includes deep understanding of the micro-architectural details of their block and how it works within the broader GPU design. A strong computer architecture background, preferably in graphics, and a proven foundation in verification methodology is required.

Key Qualifications

  • Proficiency in C++ and/or SystemVerilog in a modeling or verification context
  • Expertise in developing testplans, defining coverage space, writing coverage models, analyzing results
  • Experience with verification methodologies such as UVM, OVM, VMM
  • Experience working under strict schedule deadlines with the ability to manage multiple priorities
  • Graphics architecture and programming (OpenGL) is helpful
  • Experience with numerics and color formats is helpful
  • Experience with Perl, Shell scripting, Makefiles, TCL a plus


Develop verification plans in coordination with design leads and architects Craft and maintain verification test bench components and environments Generate directed and constrained random tests Run simulations and debug design and environment issues Build functional coverage points, analyze coverage, and improve test environment to target coverage holes Create automated verification flows for block verification Apply knowledge of hardware description languages (VHDL/Verilog) to verify complex designs Work with other block and core level engineers to ensure seamless verification flow

Education & Experience


Additional Requirements