Sr. Physical Synthesis CAD Engineer
Santa Clara Valley (Cupertino), California, United States
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and expertly handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices. In this highly visible role, you will be at the center of a silicon design group with a critical impact on getting functional products to hundreds of millions of customers quickly.
- Typically requires at least 5-10+ years of experience
- Experience in Logical and Physical Synthesis either with DCG or RCP
- Basic knowledge of Place and Route, Static timing analysis and UPF required
- Experience in Formality and/or Conformal is a plus
- Should have experience scripting in TCL or Perl
- Good interpersonal skills, previous customer support is preferred.
In this position, you are responsible for developing, maintaining, and improving existing systems for Synthesis, Physical Synthesis, Scan/BIST flows. You are expected to work with Place & Route team to improve Synthesis QoR and correlation to backend. You will be directly supporting multiple design teams and working with other CAD engineers to integrate your solutions in other flows. You will also work on debugging vendor tool problems and solving related issues.
Education & Experience