CAD Engineer – Flow Tracer
Santa Clara Valley (Cupertino), California, United States
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices. In this highly transparent role as a core team member in our advanced CAD Group, you will improve your career working on state of the art designs. You’ll utilize your hands on experience in flow graph parallelization, automation, compute and EDA licensing resource allocation, to develop/define & refine scalable methodologies to enable circuit designer to efficiently drive thousands of jobs to deliver transistor level analysis work for different IP and Meagcells targeted for parallel projects. You will acquire breath of knowledge across multiple disciplines and process nodes that include but not limited to transistor level extraction, timing analysis, static/dynamic IR analysis and simulations, power EM analysis, signal EM analysis, logic equivalency check (LEC) and signoff.
- Typically requires 5-15 years of experience in the following areas:
- Experience in implementing, maintaining and deploying dependency based flows using Make or FlowTracer
- Scripting expertise in, Tcl or Perl for wide deployment across different geographic location and groups.
- Host live debugging session at short notice and be able to focus on the short term objectives without losing sight of long-term value of developing preventive measures
- Shown background in utilizing Unix shell to improve daily productivity
- Solid exposure in revision control, license management and parallel compute (LSF, SunGrid or NC)
Responsibilities include development and integration of multiple point flows into single graphical make context; be the first line of support (setting up inputs and trouble shooting output) for various point flows and assist in removing hardware or software obstacles that jeopardize schedules; find opportunities to improve and streamlining IP deliverable turn around time. You will work closely with various design groups (Custom Digital/Analog/Mixed-Signal) on their requirements for various pre/post layout flows for each project. - You will also work with various point flow expert to qualify internal CAD flow and external vendor tool.
Education & Experience
MSEE or BSEE or equivalent.