Sr. CAD Engineer – Analog Model Verification Engineer

Santa Clara Valley (Cupertino), California, United States


Posted: Jan 25, 2019
Role Number: 200007801
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices. As a senior member of our CAD team, you will architect, develop, maintain and enhance analog modeling, simulation, and verification methodology and solutions for our analog and mixed-signal designs. You will work in a small CAD team and collaborate with design teams within Apple as well as 3rd party EDA tool vendors.

Key Qualifications

  • Typically requires 5+ years of industry experience in digital/mixed-signal modeling (Analog/RFIC design background, and CAD automation support and development advantageous)
  • Proficiency with digital and mixed signal simulators: Incisive/Xcelium, VCS, AMS Designer, CustomSim-VCS, etc
  • Strong ability to solve simulation accuracy, speed and capacity issues
  • Relevant experience in evaluating simulation and environment related CAD tool/product applications, and driving EDA vendors to meet design requirements.
  • Proficiency in SystemVerilog (2012), real number modeling, UDT/UDN, wreal, and Verilog-AMS.
  • Deep knowledge of the operating principles of common analog, RF and AMS blocks in CMOS technologies
  • Strong understanding of the implementation of high-level, mixed signal, and behavioral models for such circuits
  • Strong programming skills and good software development fundamentals in Python, Perl, and SKILL
  • Strong knowledge of the Cadence Virtuoso Design Framework, Virtuoso Schematic Editor, and Analog Design Environment (ADE-L/XL/GXL/Explorer/Assembler), including flow automation and custom netlisting with SKILL
  • Ability to provide automations for rapid and dynamic design needs (Knowledge in Perforce and/or regressions is a plus)
  • Strong communication skills with the ability to collaborate well with others


- Working with different technology nodes and providing flows/methodologies for the different tool sets - Collaborating with the analog, mixed-signal, digital, and RF circuit design teams within Apple as well as 3rd party EDA tool vendors to drive and coordinate effort of developing and validating simulation flows, improving custom design environment, validating checks and doing results analysis - Supporting and developing tools and GUIs is essential - You will own the responsibility of improving the productivity of our teams and capabilities for our analog/mixed-signal modeling

Education & Experience

MS / PhD preferred in a technical discipline

Additional Requirements