ASIC Design Integration Engineer
Santa Clara Valley (Cupertino), California, United States
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next phenomenal Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our dynamic group, you will get the unrivaled and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple’s customers every single day. Are you ready to join a team transforming hardware technology? We are searching for a talented engineer to join our exciting team of problem solvers. In this highly transparent role, you will be at the center of a SoC design effort collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly. In this highly transparent role, you will be at the center of a SoC design effort collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly.
- As a South-bridge IO SoC Integration engineer joining the South-bridge design integration team, you will have responsibilities spanning all aspects of SoC design and chip bring up.
- Work with other specialists that are members of the SoC Design, SoC Design Verification, System Verification, Firmware, Emulation, STA, and Physical Design teams to deliver a working South-bridge subsystem within the SoC
- Develop micro-architecture and design specifications
- Implement and verifying complex logic designs
- Hands-on verification and validation m on emulation platforms running with the SW driver
- Work with designers on STA, physical, power and logical issues
5+ years of RTL Logic Design experience of multi-million gate ASICs Hands on experience for all aspects of the chip development process with proficiency in front end tools and methodologies Experience writing specifications and converting them to design Experience crafting high performance, low power ASICs/SOCs from scratch Experience with timing closure on high speed, low power designs Experience with bring up and lab debug of FPGAs and silicon Prior experience or knowledge within one or a few Southbridge technologies (PCI Express, USB, NAND Flash, Audio, Security, Encryption/Decryption, SATA, SDIO, SPI, and/or UART) required Understanding of various DMA architectures, a plus
Education & Experience
BSEE / MSEE is required