Chip Level VLSI PD CAD Engineer
Santa Clara Valley (Cupertino), California, United States
Do you love building elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices. You will develop and support chip level physical design methodology and flow. This design flow is used by multiple VLSI design projects across Apple. Must have excellent CAD flow programming and algorithm development background. Knowledge of physical design CAD flow is a huge plus. You will be collaborating with VLSI physical design teams, CAD team, and EDA vendors to seek some of the most significant design problems in leading process modes. Strong analytical skill, effective social communication, and leadership quality are important to this position.
- Strong programming background is required. Has proven record in development of large scale software projects that are robust and scalable.
- Experience in applying complex CAD algorithms to aim physical design problems.
- Expertise in Tcl/Tk/Perl/Python scripting is helpful.
- Previous working or internship experience in chip design or CAD is huge plus.
- You are a self-motivated, dedicated problem solver with strong social and communication skills.
- Understand different aspects of chip design: floorplanning, placement, pin assignment, feed through insertion, clock distribution, pad ring construction, routing, timing analysis
- Working knowledge of Cadence Innovus or Synopsys ICC is a plus.
- Provide innovative solutions to improve area, power, performance of chip level VLSI designs. - Develop algorithm and GUI that uniquely addresses design challenges at Apple. - Provide documentation, training and new user support. - Responsible for flow regression, and code release for multiple projects/sites.
Education & Experience
BS in EE/CS or equivalent.