Sr. PD CAD Engineer
Santa Clara Valley (Cupertino), California, United States
Do you love building elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and authoritatively handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices.
- - Typically requires 5+ years of experience in CAD P&R flows or Design P&R
- - Expertise in one or more PNR tools.
- - Experience in different aspects of PD - timing, noise, physical verification,EM/IR/IVD.
- - Proficiency with Tcl or Perl scripting languages, Python or C++ is considered a plus.
- - Experience using or supporting sign-off tools for design closure.
- - Experience with methodology development for low power design and/or CPUs
- - Experience with Makefiles
You will utilize your hand-on skills improving and supporting the implementation flow from RTL through GDS sign-off. Primary responsibilities will include: - Developing and integrating new features in the PNR flow. - Resolving project specific issues within the build and sign-off flows - Working with vendors to resolve tool issues - Exploring and supporting methodology improvements to improve power, performance, area and productivity - Collaborating with other tools like PDV, IR, extraction and timing - Releasing flow updates to projects. - Working with other CAD engineers to lead development and support efforts.
Education & Experience
- MS/BS Degree in technical discipline