Digital IP Lab Engineer
Santa Clara Valley (Cupertino), California, United States
Do you want to utilize your engineering background to make big things happen? Can you deliver on a predictable and dynamic schedule? Do you have a passion for crafting entirely new solutions? Do you love building without precedent? As part of our Digital Design Engineering group, you’ll take imaginative and revolutionary ideas and determine how to turn them into reality. You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Your efforts will be groundbreaking, often literally. Join us, and you’ll help design the tools that allow us to bring customers experiences they’ve never before envisioned. You will be part of an exciting silicon design group that is responsible for designing state-of-the-art ASICs. We have an extraordinary opportunity for Digital Lab Engineers. You will be responsible for lab validation and characterization of embedded digital and analog circuits that go into state of the art mobile computing chips.
- We are looking for applicants with 5 or more years experience with the following skills:
- Bench testing, debug and characterization of embedded circuits.
- Testing and characterization of custom memories through JTAG and MBIST interface.
- Device tests and script development using Python, PERL, TCL and UNIX shell scripts.
- Use of electronic measurement equipment (Scopes, DVMs, DMMs, Function Generators etc.).
- Use of data analysis platforms and databases.
- Lab work including soldering/instrumenting systems for test or debug.
- Solid familiarity with JTAG protocol.
- Additional Skills:
- System Verilog experience.
- Experience with SOC and Application Processor microarchitecture.
- Experience with ATE (Manufacturing Automatic Test Equipment) such as Teradyne and Verigy tester.
- Experience with advanced failure analysis techniques such as Laser Voltage manipulation, FIB, Nano-probe.
- FPGA programming.
- Familiarity with system board design and layout.
- Microsoft Excel, R and Matlab experience.
- Ability to show a demonstrated track record of previous lab work and execution.
- Initiative to assume responsibilities with minimal direction.
- Be productive and meet aggressive deadlines.
- Possess strong written and verbal communication skills.
- Place emphasis on quality of work and prevent ‘low quality’ bugs.
Imagine yourself at the center of our hardware development effort. Where you will collaborate with all disciplines, playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come-up with new ideas, as well as work with a team of hardworking engineers. As a Digital IP Lab Engineer for the Circuits team, you will perform the following: • Bench test, debug and characterization of embedded on-chip circuits (Custom Memories, Custom digital circuits, On chip sensors, PLLs, clocks, IOs). • In-system PI/SI measurements for correlating with simulation models. • Setup, debug, and maintain lab system test environment. • Development of bench top characterization tests exercising on-chip circuits through a combination of FPGA, JTAG, and analog interfaces. • Development and execution of scripts to automate tests, extract & store results and generate reports using database and analysis tools. • Preparation of reports related to characterization and debug. • Collaborate with chip design teams, system HW and SW design teams, Test engineering and Product Engineering. • Update FPGA interfaces as new software updates are available.
Education & Experience
BSEE / MSEE is required.
- Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.