Electrical Analysis Engineer

Santa Clara Valley (Cupertino), California, United States
Hardware

Summary

Posted: Apr 16, 2019
Role Number: 200021010
At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for an ambitious and exceptionally talented electrical engineer for the physical design group. As a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming products that will delight and support millions of Apple’s customers every single day. In this role, you will be involved with PHY design effort collaborating with architecture, CAD, logic design teams, with a critical impact on delivering best in class PHY designs.

Key Qualifications

  • Preferred minimum 5 years of experience in IP design integration
  • Strong knowledge of analysis flows and methodology
  • Deep knowledge in aspects of ASIC physical design including PNR, clock and power distribution
  • Deep knowledge in package modeling techniques for chip level power analysis
  • Experience in industry standard tools used for analysis such as Apache Redhawk, Voltagestorm, ETS, PT-SI, etc.
  • Past experience of signoff on successful chip tapeouts
  • Circuit design background and hspice experience huge plus
  • Scripting skills to debug flow related issues and make enhancements as appropriate
  • Real chip tapeouts experience with a track record of successful signoff
  • Excellent interpersonal skills and interaction experience with sub block owners, physical design teams and different engineering groups

Description

At Apple, we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for an ambitious and exceptionally talented electrical engineer for the physical design group. As a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming products that will delight and support millions of Apple’s customers every single day. In this role, you will be involved with PHY design effort collaborating with architecture, CAD, logic design teams, with a critical impact on delivering best in class PHY designs. KEY QUALIFICATIONS - Preferred minimum 5 years of experience in IP design integration - Strong knowledge of analysis flows and methodology - Deep knowledge in aspects of ASIC physical design including floorplanning, clock and power distribution - Deep knowledge in package modeling techniques for chip level power analysis - Experience in industry standard tools used for analysis such as Apache Redhawk, Voltagestorm, ETS, PT-SI, etc. - Past experience of signoff on successful chip tapeouts - Circuit design background and hspice experience huge plus - Scripting skills to debug flow related issues and make enhancements as appropriate - Real chip tapeout experience with a track record of successful signoff - Excellent interpersonal skills and interaction experience with sub block owners, physical design teams and different engineering groups As a physical design electrical engineer, you will have responsibilities spanning all aspects of IP. Your tasks includes but not limited to performing various electrical analyses at the chip level, Static/Dynamic IR, EM, Noise and Signal EM. You will collaborate with the CAD/technology teams for flow bring up and validation. You will also be working with the implementation team during the entire chip design cycle to drive signoff closure for tapeout. You are responsible in managing schedules and supporting cross-functional engineering effort performing various types of physical verification checks (such as LVS, DRC, design-for-manufacturing & design-for-yield, and lithography) at the chip and block level.

Education & Experience

MSEE (preferred) or BSEE, or equivalent is required

Additional Requirements