DRAM Debug Engineering Program Manager

Santa Clara Valley (Cupertino), California, United States
Hardware

Summary

Posted:
Role Number:200031760
Are you a leader? Do you want to utilize your engineering background to make big things happen? Can you influence, connect, get results and communicate effectively? Can you deliver on a predictable yet dynamic schedule? As a Mobile DRAM Program Manager, you help craft the DRAM industry’s mobile roadmap and drive innovative DRAM technologies to accompany SoC’s across Apple’s product lines. In this dynamic role, you will be the critical interface to the DRAM suppliers as well as work with the Apple’s DRAM architecture, Memory Controller Design and DV, DDR PHY and DRAM product engineering teams to ensure the most advanced memory technologies are delivered from architecture to mass production to Apple’s industry leading quality standards.

Key Qualifications

  • Requires 7+ years experience in SOC/VLSI Chip Design, DRAM/storage, Product Engineering, with 3+ years of Technical program management/ customer support experience.
  • Experience shipping high volume DRAMs / SoCs.
  • Experience with SoC memory architecture, advanced DDR controller / PHY design and high speed IO interface.
  • Experience working in a dynamic multi-disciplined engineering environment, strong at multi-tasking, and real-time crisis management.
  • Passionate to own/drive project development using well-defined metrics.
  • Ability to understand and extract action plans from complex technical discussions and translate into succinct messaging for multi-functional and executive status reporting.
  • Phenomenal leadership and social skills with a reciprocal mindset.
  • Thrives in dynamic schedule driven development environment.
  • Excellent debugging skills and proven ability to drive resolution of critical problems, while under pressure.
  • Able to travel domestically and internationally.

Description

- Interface and drive DRAM issues across multi-functional teams: Systems Hardware, Software, Product/Test/QA Engineering, Design, Verification, and Silicon Validation teams. - Plan and lead adoption of DRAM technologies, custom package development and qualification process with multi-functional teams. - Work closely with the DRAM Global Supply Management (GSM), DRAM & Package Engineering and SoC Program Management organizations to set priorities. - Lead DRAM vendors to meet spec and schedule requirements. - Attend and drive technical sessions with DRAM vendors on new DRAM technology development to track and follow up issues/escalations. - Work with DRAM GSM and silicon material management teams to plan and track distribution of new DRAM material across all systems in development. - Enable tight collaboration between Design for Test (DFT), Product/Test/QA engineering, SiVal and Systems teams during NPI to finalize SoC performance targets and screen requirements. - Focused issue reporting, bug tracking, organizing and reporting of program risks and status at an executive level.

Education & Experience

MS / BS Degree in technical discipline.

Additional Requirements