SoC System Level Test, Tools and Infrastructure Engineer

Santa Clara Valley (Cupertino), California, United States
Hardware

Summary

Posted:
Role Number:200032673
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and expertly handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices. The System Level Test (SLT) is part of Apple’s Silicon Engineering Group design the SLT platform and manufactures the next-generation, high-performance, power-efficient processor, system-on-chip (SoC). The SLT Tools and Infrastructure Engineer is experienced in software, electrical and/or manufacturing test engineering and will collaborate with the product development groups in building the necessary tools and infrastructure to support SLT.

Key Qualifications

  • Expert or near expert level in C , C++ or C# programming.
  • Strong familiarity with various design patterns to support a highly parallel and multi-threaded software environment
  • Have experience building highly scalable, low latency systems
  • Experience in both low-level operating system functionality (e.g. memory/IO/Disk/CPU/resource management, multi-threading) as well as high-level application level software.
  • Experience performing hardware bring-up
  • Advanced knowledge of computer networks (TCP/IP), protocols,IPC, multi-threading etc
  • Experience in socket, network, and systems programming in C/C++ or C#
  • Some experience with Python and similar scripting
  • Experience with manufacturing and provisioning processes for devices
  • Ability to read hardware spec and data sheets
  • Familiarity with semiconductor test methodology
  • Some experience or knowledge of security and obfuscation of software
  • Familiarity in debugging USB/JTAG issues with analyzer and use of Oscilloscope.

Description

- Design and implement high-performance, high-availability tester infrastructure - hardware/software and network - Design and implement hardware abstract layer software components - Design and implement custom work flow management techniques to drive SLT software - Design and implement efficient data processing and visualization techniques - Design & implement highly reliable and efficient communication - Design and develop hardware characterization routines - Implement diagnostic tools to support benchmarking and characterization of hardware and network. - Develop and debug drivers - Adopt test driven development and deliver high quality code - Interact with cross functional groups to influence software and hardware design

Education & Experience

BSEE / MSEE is required

Additional Requirements