Pixel IP Design Engineer
Santa Clara Valley (Cupertino), California, United States
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next phenomenal Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our dynamic group, you will get the unrivaled and rewarding opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every single day. Are you ready to join a team transforming hardware technology? We are searching for a talented engineer to join our exciting team of problem solvers. In this highly visible role, you will be at the center of a multimedia IP design effort interfacing with all disciplines, with a critical impact on getting functional products to millions of customers quickly.
- You will have 3+ years of experience in multimedia IP/SoC design, including:
- Previous strong experience in media, video, pixel, or display designs.
- A deep understanding of timing/area/complexity trade-offs for complex data path design.
- Familiarity with common on-chip bus protocols such as AMBA (AXI, AHB, APB).
- Experience in front-end implementation tasks such as synthesis, STA, and logic equivalence.
- Industry exposure to and knowledge of ASIC/FPGA design methodology.
- Excellent collaboration skills.
- Excellent written and verbal communication.
As an IP Design engineer you will have responsibilities spanning all aspects of multimedia IP design: • Collaborate with architecture team to write microarchitecture specifications and define interfaces for pixel-processing IP. • Perform feasibility analysis on suggested architecture(s) and algorithm(s). • Perform RTL design and logic implementation of agreed architecture, • Integrate subsystems that have both internal and external IP’s, • Perform front-end implementation tasks such as synthesis, logic equivalence check, and STA.
Education & Experience
• MSEE or BSEE Degree, or equivalent is required