CPU Design Verification Engineer

Portland, Oregon, United States


Role Number:200076766
Do you love working on challenges that no one has solved? Are you ready to be part of a team transforming silicon technology? Join us to help deliver the next groundbreaking Apple product. At Apple, we believe new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. We are building the best Silicon Engineering Group in the world. We’re looking for a hardworking individual to join our team. In this highly visible role, you will be at the center of a chip design effort interfacing with all disciplines, with a critical impact on getting functional products to millions of customers quickly.

Key Qualifications

  • The ideal candidate should have 5+ years of CPU verification experience
  • In-depth knowledge of digital logic design, chip architecture and microarchitecture
  • Experience with expertise in developing testplans/testbenches, C-based transactors, and writing/debugging assembly based tests
  • Experience with advanced verification techniques such as formal and assertions a plus
  • Experience in silicon bringup a plus
  • You are a phenomenal teammate with excellent communication skills and able to work independently on the verification efforts for a block/area of the design


• Develop verification plans in coordination with design leads and architects • Create and maintain verification test bench components and environments • Generate directed and directed random tests • Run simulations and debug design and environment issues. Build functional coverage points, analyze coverage, and enhance test environment to target coverage holes • Apply knowledge of hardware description languages (VHDL/Verilog), hardware verification languages (SystemVerilog, C/C++), and logic simulators to verify complex designs and create verification infrastructure

Education & Experience

BS/MSEE is required.

Additional Requirements