Touch Sensing HW - ASIC Digital Architect (EE)
Santa Clara Valley (Cupertino), California, United States
Design, develop, and launch next-generation Touch Technologies in Apple products. The Touch Technology team develops cutting-edge Touch solutions and technologies that are central to Apple’s products, including the iPhone, iPad, MacBooks, and more. The key goal of the Touch Technology team is to enable the world’s best multi-touch user-experience. The team features a collaborative and hands-on environment that fosters engineering excellence, creativity, and innovation. The ASIC Digital architect is a key architect responsible for analyzing the application and coming up with cost and power optimized digital for the touch and other sensing ASICs. These designs may include one or multiple processor and/or DSP cores and microarchitecture of custom control engines.
- Experience leading chip architecture and/or digital design is desirable, preferably in touch or communications.
- Hands-on experience in design, development and launch of high volume IC designs in consumer products; direct experience with touch technology and/or flat panel display technology is beneficial.
- Strong electrical engineering background embedded system design including ASIC microarchitecture, computer architecture, SoC architecture, and custom or standard DSP or hardware accelerator microarchitecture
- Experience in FPGA emulation system design preferred, including leading pre-silicon system validation, prototype bring-up, debug, validation, characterization, and module integration support
- Excellent written and verbal communication skills and solid teamwork and leadership skills.
- Proficiency in MATLAB, Verilog, or similar simulation, design and modeling tools.
- Experience with DSP, estimation algorithms, and/or machine learning HW is a plus.
Touch sensor digital system architecture. Develop high performance, low power signal processing architectures and sensing algorithms to achieve the best touch solutions. System-level design and IC micro-architecture definition of complex digital and mixed-signal ASICs including requirements for: ARM processing, memory, bus, and DSP sub-systems Power Management, clocking, I/O interfaces, and peripherals Define common Digital platform architecture framework including design methodology and best practices to be used as a reference for Architecture team Cross disciplinary design optimization, hardware/software design partitioning, trade-off assessments and design checking. Author detailed specifications, analyses, and characterization plans for touch system ASIC’s Defect root cause analysis and resolution, including diligent bug database tracking. Minimal business travel as needed to support product development. Manage cross-function technical development of Touch solutions. Engage and collaborate with cross-functional teams, including Mechanical Engineering, Firmware Engineering, Algorithms Engineering and Process Engineering, to deliver state-of-the-art Touch solutions. Author presentations that communicate program status, technical issues, risks, and mitigations plans, clearly and concisely. Contribute technical assessments to strategic decision-making relating to technology and investments.
Education & Experience
- M.S. or Ph.D. in Electrical Engineering or industry experience equivalent, with 5+ years of digital design and architecture experience.
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