Performance Model Development and Analysis Engineer
Santa Clara Valley (Cupertino), California, United States
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, smart people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next phenomenal Apple product. Do you enjoy working on challenges that no one has solved yet? As a member of our dynamic group, you will get the unique and rewarding opportunity to craft upcoming products that will delight and inspire millions of Apple’s customers every single day. Are you ready to join a team transforming hardware technology? We are searching for a hardworking engineer to join our exciting team of problem solvers. In this highly visible role, you will be a member of a performance model development effort collaborating with many disciplines, with a critical impact on future architectural performance, power, and area improvements.
- 5 year’s experience
- Strong problem solving and analytical skills
- Strong SW skills with deep understanding of modular object-oriented software development
- Knowledge of C/C++, Python, Lua, Perl preferred
- Model development and analysis experience preferred
- Excellent written and verbal communications
- Strong collaboration skills
- Proficiency in computer/SoC architecture and performance trade-offs
- Knowledge of Verilog and/or VHDL and experience with simulators and waveform debugging tools desired
- Ability to conduct experiments in all phases of design, bringing together and analyzing data; and utilize scripting/spread sheet to document and present the results
As a performance model developer for the IP blocks you will have responsibilities spanning all aspects of SOC performance, power, and area tradeoffs: • Working with architecture and design teams to plan and implement a high-level performance model. The performance model is minimal feature set to meet the model requirements yet modular and flexible enough to be adapted for new projects and experiments. • Planning and analyzing results of performance studies for different micro-architectural proposals • Providing feedback to the architecture and design teams regarding the micro-architectural choices that may have been made. • Correlating performance model against the performance specifications, expectations, and help the verification team correlate against the RTL implementation.
Education & Experience
BS/MS in EE/CS is required