Senior Foundry Interface and Design Enablement Engineer - PMIC
Santa Clara Valley (Cupertino), California, United States
Can you influence, connect, get results and communicate effectively? Do you want to utilize your engineering background to make big things happen? Can you deliver on a predictable and dynamic schedule? As part of our Silicon Engineering group, you will take imaginative and revolutionary ideas and figure out how to turn them into reality. You and your team will apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world. Join us, and you will help design products that bring to our customers experiences they’ve never before envisioned. You will work at an exciting silicon design group that is responsible for crafting state-of-the-art ASICs. We have an extraordinary opportunity for Foundry Interface Engineers. We are looking for a motivated engineer to fill a full-time position.
- We are looking for applicants with at least 10+ years of experience in semiconductor process technology and manufacturing. Direct experience in PMIC development programs and experience with process qualification & yield enhancement are a plus.
- Deep knowledge of CMOS and BCDMOS particularly in the field PMU in essential.
- Deep experience working with advanced BCD PDKs and collateral such as Spice models, DRM/DRC, LVS, RC tech files.
- Experience collaborating with design (power, analog & digital) in these technologies.
- Demonstrated prior experience and success solving highly complex technical problems under a very aggressive schedule is essential.
- Good data analysis, problem solving, and very strong communication skills.
- Self-motivated and schedule oriented.
Imagine yourself in our processor design effort, collaborating with design teams and providing technology support, with a critical impact on getting functional products to millions of customers quickly. In this highly visible role, you will be at the center of process technology problem solving with focus on collaborating with internal PMU design and foundries. This is a hands-on, dynamic role requiring travel to foundries and development sites. Your main responsibilities for this role will be: - Manage technical process collaborate with foundries. - Provide support for product development, tape out and debug. - Support design and infrastructure teams on PDK components such as LVS, DRM/DRC, Spice models and tech files. - Work closely with foundries on supplier silicon process issues. - Participate in technology development, device engineering for PMIC next generation process technologies. - Drive thorough investigation of root cause and solutions to process/yield issues and its impact on product production, performance and reliability during product evaluation and initial ramp. - Lead and mitigate technology risks for multiple projects in parallel. - Engage parties in decision-making and work towards timely closure and thorough follow-through. - Build essential internal and external relationships at suppliers and within Apple.
Education & Experience
- BSEE / MSEE, PhD preferred.
- Travel availability is required.
- Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.