Display Pipeline Engineer - Visual Quality Validation

Santa Clara Valley (Cupertino), California, United States
Hardware

Summary

Posted:
Role Number: 200112679
Apple display engineering organization is looking for a Display Pipeline Engineer to perform visual quality validation for the next generation display pixel and backlight pipeline IPs. The role offers an incredible opportunity to learn from world class experts in multiple disciplines spanning from EE to system, mechanical, manufacturing, etc. Join us in crafting solutions the world doesn't know of yet. To be successful, you should be able to thrive in a dynamic, agile, multi-disciplinary, and hands-on environment that values engineering excellence, creativity, and innovation.

Key Qualifications

  • Excellent communication skills and ability to collaborate under aggressive schedules.
  • Shown a natural tendency to step out of your comfort zone.
  • Excellent math and analytical skills.
  • Experience in the field of image/video processing algorithms and/or architectures.
  • Experience with relevant developments using programming tools and languages such as C/C++, MATLAB, Python, Lua, HLS, etc.

Description

We are looking for a talented engineer/researcher with very strong analytical skills and a passion for creating and innovating. The main responsibilities are outlined below, and these will become a second nature as the candidate gains the necessary experience and knowledge in the work: - Challenge the algorithm and architecture assumptions and specs in the most logical way. - Perform front-of-screen evaluations through the use of platforms such as Matlab/C models, FPGA systems, Prototyping HWs, etc. - Craft necessary tools and frameworks to efficiently carry out the evaluations and validations of the display system. - Drive collaboration with key partners such as algorithm, architecture, silicon, FW, SW, EE, etc. to plan, execute, and report status of the testing.

Education & Experience

- PhD or MS in an Engineering discipline, or equivalent experiences.

Additional Requirements