Sr. Signal Integrity Engineer
Santa Clara Valley (Cupertino), California, United States
The candidate will work within the Mac organization to support the system level SI and PI aspects of Mac and Accessory products development. You must have deep knowledge of all aspects of Signal Integrity for high speed serdes, parallel bus, single ended signaling, and signaling interfaces deployed in personal computers and peripherals. You should have familiarity with power delivery network design and analysis.
- The candidate must have system level serdes design and analysis skills. The serdes knowledge required includes understanding of transmitter and receiver equalization methods (including FFE, CTLE, DFE, VGA gain), CDR behaviors and modeling, and link training algorithms. Serial bus expertise shall include knowledge of the specifications and means and methods of PCIe, USB3, USB4, DisplayPort, and Thunderbolt.
- Skills required include DOE analysis across channel variants, applying equalization and training as required for end-end results, including eye margin, BER, and yield results. Parallel bus interface expertise should include DDR, GDDR, LPDDR, NAND interfaces, and common synchronous interfaces.
- You should be able to model physical signaling channels. Topologies including differential, single ended, and parallel bus types. Interconnect modeling capability, using S-parameter, W-elements, etc is required.
- Deep understanding of channel types including cabling, pcb materials, flex materials, and connector design methods and limitations is required. Skills with associated tools for 2D, 3D Full wave (HFSS, Nimbic), quasi-static tools, Spice, AMI modeling is required.
- Working knowledge of ADS is desired. Measurement expertise with frequency and time domain tools (VNA, TDR) including calibration methods is desired. Experience with PERL and other scripting languages is desired. MatLab Experience is a plus.
- Excellent documentation and communication skills, ability to work independently, a desire to mentor, and demonstrated ability to innovate are required. The ability to model PDN networks and guide implementations toward project targets is desired. You should have experience in creating initiatives that improved process, procedures, and result quality.
The position includes system development and system design which continues from initial concept stage through the development process. The roll includes SI and PI team support through the specific project design process which can include system verification stages, and characterization reviews with continuing guidance through production ramp. Teamwork includes coordination with overall system architects (both mechanical and electrical), end product system EE engineer.
Education & Experience
10 years experience, or BSEE with minimum of 5 years experience