GPU Senior DFT Design Engineer

Austin, Texas, United States


Role Number:200132254
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, GPU. You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices! In this highly visible role, YOU will be at the center of a processor design effort collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly!

Key Qualifications

  • The ideal candidate will have 5+ years of DFT experience, leading DFT efforts for large processor and/or SOC designs as well as:
  • Knowledge about industrial standards and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time
  • Experience developing DFT specifications and driving DFT architecture as well as methods for designs
  • Knowledge of Verilog and/or VHDL, and experience with simulators and waveform debugging tools
  • Deep knowledge of industry standards DFT and design tools
  • Deep understanding of design verification (DV) methodologies for validating DFT implementation in simulation pre-silicon
  • Experience in debugging ATPG patterns, Compressed ATPG patterns, MBIST, and JTAG/1500 related issues
  • Experience with STA constraints development and analysis for DFT modes and SDF simulations
  • Ability to conduct experiments during silicon debug, gathering and analyzing data; and use scripting to support efficient handling of ATE data


As a DFT engineer responsible for the complete DFT solutions for a processor project, you will own responsibilities spanning all aspects of processor design. You will also be work with the SOC DFT team to document processor DFT specifications and define the SOC-processor test interface. Additional responsibilities include: - Developing and implementing DFT architecture - Implementing DFT infrastructure - Engaging with the DV team to verify DFT implementations and implement ECOs - Generating structural test vectors and analyzing and improving coverage - Collaborating with designers on STA, physical, power and logical issues - Collaborating with test engineers to bring up test vectors on silicon - Handling schedules and supporting multi-functional engineering efforts

Education & Experience

BS/MS/PhD in Computer Engineering or Electrical Engineering or the equivalent experience

Additional Requirements