GNSS RTL Digital Design Engineer

San Diego, California, United States


Role Number:200144147
Would you like to join Apple’s growing wireless silicon development team? Do you like hard problems? Global Navigation Satellite Systems (GNSS) space vehicles transmit the power of a lightbulb, they are 13,000 miles away, and are moving four kilometers per second. The received signals are commonly one hundred times weaker than cosmic microwave background radiation left over from the Big Bang and arrive next to interfering signals ten billion times stronger, just few MHz away. Our GNSS team is part of Apple's Cellular SoC team. We are a vertically coordinated engineering team spanning RF, mixed signal analog design, systems engineering, RTL design, DV, firmware and software engineering, test, and validation. Our focus is on highly energy efficient and robust GNSS receiver design. We develop GNSS technology that touches hundreds of millions of lives, something we are passionate about. We’d like you to consider being a part of our team. As a GNSS PHY RTL Digital Design Engineer, you will be at the center of the silicon design group with a meaningful role getting functional products to millions of customers quickly.

Key Qualifications

  • 5+ years of experience with power efficient RTL Digital Design
  • Good knowledge in modern design techniques and energy-efficient/low power logic design
  • Solid background in computer architecture including one or more of the following:
  • Bus fabric, especially APB/AHB/AXI
  • Tiered memory systems
  • System debug architecture
  • Power management with multiple power domains
  • Integer and floating-point numeric units
  • High-speed data path and control units
  • Track record of bringing logic designs into mass production
  • Ability to work well in a team and be productive under aggressive schedules
  • Excellent communication skills and self-motivation/organization
  • Experience with FPGA and/or emulation platform desired
  • Ability to drive strong production test/QA methodologies a plus


In this role, you will develop signal processing intensive design for GNSS SoCs, including: - Microarchitecture definition - IP integration, RTL logic design, and verification support - Running tools to ensure lint-free and CDC clean design - Synthesis and timing constraints - Collaboration with system/algorithm and FW team to ensure performance and power efficiency

Education & Experience

- Bachelors of Science is required. - MSEE or PhD preferred.

Additional Requirements