IC Packaging Integration Engineer
Santa Clara Valley (Cupertino), California, United States
Do you like to work on ground breaking technologies that enable amazing new products? Do you have the attention for details and love for excellence to work towards an extraordinary result? We are looking for a hardworking and passionate IC Packaging Engineer to join our team. In this highly visible role, you will develop advanced packaging technologies, define assembly baseline processes, decide package BOM, establish package design rules that are optimized for performance, reliability, yield and cost for a variety of projects including SoC.
- 5+ years of extensive experience in Semiconductor Packaging field.
- Working knowledge in materials characterization and analysis
- Working knowledge of large FCBGA package, MCM package, 2.5D packaging and 3D packaging technology.
- General understanding of packaging technologies, assembly processes, IC packaging materials, reliability standards, FA techniques, etc.
- Good communication skills that can enable you to work well with internal multi-functional teams and overseas suppliers.
- Ability to work independently and take on projects with minimum supervision.
- Good engineering problem solving skills with strong engineering physics and fundamentals.
- Can use package design softwares, APD, Virtuoso, etc.
- Working knowledge in memory packaging.
- Good program management skill
Responsible to lead packaging technology development. Work with cross functional team and lead SoC Package development efforts. Package architecture / Package integration Innovation Work with foundry and OSAT to bring packaging solution from concept to HVM. Drive industry with advanced Package solutions, new material development, and specs. 5% International travel.
Education & Experience
M.S. or PhD in Materials Science, Mechanical Engineering or an equivalent field desired.