SEAR - Firmware Integrity Engineer
Santa Clara Valley (Cupertino), California, United States
Software and Services
In the Security Architecture and Engineering Firmware Security team, we're always looking for new ways to ensure the secure function of the many firmwares which make up modern computing platforms. Beyond architecting security into the design from the start, the team also has an interest in improving the visibility into the correct functioning of these firmwares, via measurement and attestation (M&A). We are seeking someone to be responsible for the architecture and implementation of this M&A effort. An ideal candidate will have a capability to work closely with multiple teams over many years to understand their hardware architecture and the capabilities and limitations for M&A, and provide feedback for future designs to improve or standardize the M&A design across all devices
- Bachelors of Science or equivalent + 3 years experience
- Experience writing tools in C in both userspace and kernelspace
- Experience with at least one trusted execution environment (TEE) technologies such as TXT, SGX, TrustZone, dedicated security processors, etc
- Experience with at least one M&A technology such as TPMs, RIoT/DICE, DAA, etc.
- An understanding of one or more of x86, ARM, or MIPS assembly languages
- Knowledge of reverse engineering and binary analysis, and a capability to automate binary analysis logic
- Experience performing statistical data analysis in Python or language of choice
Experience writing tools in C in UEFI Experience writing parsing tools in type-safe or memory-safe languages Experience with technologies like reproducible builds and software transparency
Education & Experience
BSCS, BSCE or equivalent + 5-10 years on-the-job security engineering experience required.