Modem Performance Modeling Architect – Cellular
Santa Clara Valley (Cupertino), California, United States
Do you have a passion for invention and self-challenge? Do you thrive on pushing the limits of what’s considered feasible? As part of our modem development team, you’ll architect sophisticated leading-edge wireless modems that deliver more performance in our products than ever before. You’ll work across disciplines to transform improved hardware elements into a single, integrated design. Join us, and you’ll help us innovate new wireless systems technologies that continually outperform the previous iterations. By collaborating with other product development groups across Apple, you’ll push the industry boundaries of what wireless systems can do and improve the product experience for our customers across the world. As a Modem Performance Modeling Architect on this team, you will be responsible for validating architecture definition, exploration and modeling of sub-systems within the modem – L1/L2/L3/L4 processing sub-systems, memory sub-system, processors, caches, interconnects, etc. You will be responsible for C/C++ modeling of these sub-systems, defining performance critical metrics, conducting simulation studies and impacting modem architecture definition. This position requires someone familiar with HW architecture exploration and validation through performance simulations, that thrives in a dynamic, multi-functional organization, is not afraid to debate ideas openly, and is flexible enough to pivot on constantly evolving requirements.
- TO SUCCEED IN THIS ROLE, YOU WOULD HAVE:
- Deep knowledge of developing SoC and IP sub-system performance simulators
- Excellent C/C++ coding and debug skills
- Experience in developing and using models for different HW components – modem L1/L2 processing engines, CPU’s, fabric/NOC’s, memory sub-system, DMA’s, etc.
- Familiar with modem dataflow modeling – proven understanding of interaction between different sub-systems
- Knowledge of SRAM/DRAM memory, cached CPU’s, IO’s, SERDES links, etc.
- Led performance studies for a major sub-system in a wireless cellular modem
- Scripting and automation for performance simulations
- Bring up real silicon in lab, able to efficiently use lab equipment (such as spectrum analyzer, signal generator, power meter, etc.).
We are looking for someone who will be steering our physical layer system design and algorithm development as part of our team, responsible for state-of-the-art wireless products. Architecture exploration of state-of-the-art physical layer wireless communication system algorithms and packet processing algorithms for very high data rate applications with C/C++ performance simulations. Architecture validation – analysis of requirements, HW-SW split, analysis of power/performance/area tradeoffs, performance simulations Collaborate with our architects, HW team and SW team to realize an architecture that is performance, power and area efficient. Test and characterize real silicon in lab, establish correlation between pre-silicon performance studies and silicon measurements.
Education & Experience
MS with 7 Years or Ph.D. with 4 years in modem architect development.