GNSS RFIC Design Engineer
Santa Clara Valley (Cupertino), California, United States
Would you like to join Apple’s growing wireless silicon development team? Our wireless SOC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. As an RFIC design engineer, you will be at the center of a wireless SoC design group. You will have a critical impact on getting Apple’s state-of-the-art radios into hundreds of millions of products.
- Typically requires at least MS + 4 years of experience or a PhD in the area of RF/Analog IC design with advanced CMOS technology nodes.
- Deep understanding of RFIC circuit design. Direct tape-out experience with one or more of the following blocks: RF front-end circuits, PA, LNA, mixer, oscillator, PLL, LO, VGA, filter, TIA and/or other baseband analog blocks in deep sub-micron CMOS technology.
- Hands-on experience in GNSS RFIC and RF systems design and familiarity with RF coexistence in a cellular and mobile wireless device is critical to have.
- Deep understanding of analog design concepts such as analysis of noise, linearity, mismatch, stability and other analog impairments.
- Deep understanding of CMOS device physics, RF device modeling, device noise parameters, inductor modeling.
- Insights into packaging effects, supply isolations, high frequency ESD structures, and circuit layout for optimum RF performance.
- Familiarity with various RF transceiver architectures and their trade-offs, as well as calibration methods used for different RF transceiver architectures.
- Familiarity with Cadence Virtuoso, Spectre RF, EMX and similar tools.
- Understanding of system specifications and ability to work with system architects to translate system requirement into circuit requirement at IC level.
- Experience in Si characterization and debug.
As a GNSS RF IC design engineer and a key member of a small RFIC team, you will research, design and bring the next-generation wireless SoCs into high-volume production at advanced CMOS technology nodes. Responsibilities include: - Design of analog and/or RFIC blocks. - Overseeing the layout and verifying the design to ensure a successful tape-out. - Testing the design and debugging the issues that may arise from early development stages through productization. - Collaborating with the system group to define the requirements for RF and baseband blocks based on the system requirements. - Working with the technology team to understand the capabilities and limits of the technology node to achieve the optimum performance.
Education & Experience
MSEE required; PhD preferred.