Sr. Display Power IC Chip Architect
Santa Clara Valley (Cupertino), California, United States
This is an excellent opportunity to work on the forefront of Power Electronics technologies with the exemplary company consistently bringing innovations in the industry. The position primarily involves advanced architecture design and definition of analog and mixed-signal power ICs, which are implemented in display modules of products used by millions of people. This is a unique opportunity for “out of the box problem solver” who can enable innovative technologies for next generation Display Power Management systems in Apple products and shape its future products. Join us in crafting solutions the world doesn't know of yet. To be successful, you should be able to thrive in a dynamic, agile, multi-disciplinary, and hands-on environment that values engineering excellence, creativity, and innovation.
- Power IC design and possess deep knowledge of DC-DC power conversion topologies and display power management requirements.
- Analog block design and analysis, top-level chip integration.
- Familiar with DC-DC, LED backlight drivers, OLED/LCD Power Controller IC architectures, PCB layout and state-of the art techniques for integration and efficiency optimizations.
- Deep knowledge of silicon physics and silicon processes including IC packaging technologies.
- Familiar with challenges of mixed-signal ICs design. Must possess knowledge and experience with both analog and digital design with an emphasis on analog. Must know the complete methodology of mixed-signal IC from a concept to a product.
- We are looking for highly motivated, self-starter with innovation, integrity and attention to details.
- Strong analytical/problem solving skills and ability to guide critical decisions.
- Strong communications and interpersonal skills to work with cross-functional teams, and to collaborate with colleagues.
- Possess good understanding of thermals, mechanical and packaging challenges. Must possess knowledge of high volume manufacturing technologies and production variance.
- Proficient in using Spice and behavioral simulation tools, and Matlab/MathCad mathematical analysis.
- Proven track record of working in fast paced innovative work environment in power management semiconductor/silicon companies.
- Able to travel internationally as needed.
As a Display Power IC Chip Architect, you will be driving innovative PMIC and Power Controllers definition and working with display electrical engineers to validate silicon/module performance and qualify the ASIC’s in the system/display integration. Core architecture and technologies investigation by arbitrating various options with technical rigor for key power metric performance optimization including but not limited to efficiency, power density, cost, reduced carbon foot print and scalability. Be a key member for Apple’s core architecture team for new product ideas and system level partitioning, integrations and product definitions. New power architecture concept definition for display PMIC and LED backlight driver ICs and topologies. Perform rigorous design reviews with silicon vendors to ensure proper implementation and meeting display system requirements. Provide design simulation, calculation and analytical models for prediction of design concept outcome including control loop stability, transient responses, layout analysis and parasitic extractions. Provide silicon bench validation results, and document and review. Hands-on work in lab is a must. Provide technical support for production issues debug and resolutions. Interface and work with cross functional teams to drive to unified conclusions and decisions. Provide smooth hand-off of new architecture to execution team with design analysis, risk assessments, mitigation plans, development lessons learned and proof of concepts. Define the roadmap for the next generation display silicon and display subsystem. Spear head innovation thru exemplary behavior and teamwork.
Education & Experience
MSEE in power electronics with 10+ years experience MUST. PhD preferred.