CAD Engineer – Analog/RF Simulation Flow & Methodology

San Diego, California, United States


Role Number:200162678
Do you love building elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you’ll be responsible for crafting and building the technology that fuels Apple’s devices. Together, you and your team will enable our customers to do all the things they love with their devices. As a senior member of our CAD team, you will architect, develop, maintain and enhance simulation methodology and solutions for our Analog, RF and Mixed-signal designs. In this role, you will work with different technology nodes and provide flows/methodologies for the different tool sets. While working in a small team, you will be collaborating with the analog, mixed-signal, and RF circuit design teams. You will also be partnering with layout design, technology, and 3rd party EDA tool vendors to drive and coordinate effort of developing and validating simulation flows, enhancing custom design environment, validating checks and doing results analysis.

Key Qualifications

  • 5+ years of industry experience in circuit simulations with Analog/RFIC design background and/or related CAD/automation support areas involving various technology nodes and tape out
  • Proficiency with spice simulators, including Spectre/APS/XPS, Spectre RF, AFS (BDA), Hspice, HspiceRF, EMX, ADS, GoldenGate, AMS Designer, XA, Hsim, FineSim, etc. Strong ability to tackle simulation accuracy, speed and capacity issues.
  • Prior experience in evaluating simulation and environment related CAD tool/product applications, and driving EDA vendors to meet design requirements
  • Understand custom IC designs, and knowledge of Post-layout extraction
  • Understanding behavioral models for AMS/EM circuits, experience in Verilog- AMS. Knowledge of PDK and spice models qualification
  • Very efficient programming skills in SKILL, Python, Perl, TCL, or Shell. Ability to provide automations for rapid and dynamic design needs. Knowledge in Perforce and/or regressions
  • Knowledge in Virtuoso Schematic Editor, Virtuoso Analog Design Environment (ADE-L/XL/GXL), Virtuoso Layout Editor, Constraints, pcells is a plus
  • Candidate should be a great teammate with strong written and verbal communication skills, and able to work multi-functional teams


- Deep understanding of transistor level simulations for Analog, AMS and RF applications with industry standard SPICE simulators. Experience with RF and microwave simulation technologies such as Transient Noise, Periodic Steady State - Harmonic Balance, S-parameters, and Electromagnetic simulation. Experience with statistical simulations using Monte Carlo methods and reliability/aging analysis. Proficiency with ADE, ADE-XL/Assembler technologies, and simulation automation with OCEAN - Proficiency with the Cadence Virtuoso Design Framework (dfII), including flow automation with SKILL, PDK customization, CDFs/Callbacks, netlisting - Deep knowledge of the operating principles of common analog, RF and AMS blocks, Spice Modeling in Nano CMOS technologies - Back-end knowledge on Virtuoso XL, constraints, modgen, layout, pcells, LVS, DRC, ERC checks and extraction is a bonus

Education & Experience

MS / PhD preferred in a technical field.

Additional Requirements