SILICON ARCHITECTURE PMIC VALIDATION ENGINEER
Santa Clara Valley (Cupertino), California, United States
verification of specifications to ensure chip will be compliant with application requirements, ensuring silicon includes sufficient DFT features to support validation and in-system testing, definition and execution of silicon system validation at component and module level, reviewing internal chip usage including schematics, PCB layout, chip configuration and usage, and providing silicon debug support to internal teams. Join us in crafting solutions the world doesn't know of yet. To be successful, you should be able to thrive in a dynamic, agile, multi-disciplinary, and hands-on environment that values engineering excellence, creativity, and innovation.
- - 6+ years in PMIC architecture, PMIC applications engineering and/or PMIC verification
- - Significant experience in PMIC controller design, modeling and/or analysis
- - Power converter modeling and simulation in matlab/simulink, simplis, cadence or similar
- - Significant hands-on lab experience in measurement, automation and/or debug
- - Programming experience in python, matlab, C++ or similar tools
- - Strong communications and presentation skills
- - Limited travel
This exciting role will require developing a deep understanding of Apple display module requirements for power converters combined with your existing deep understanding advanced power converter architectures. This role is highly collaborative and involves working with multiple cross functional teams. Excellent teamwork, communications and collaboration skills are required.
Education & Experience
BSEE required, MSEE or greater preferred