CPU Clock Implementation Engineer
Santa Clara Valley (Cupertino), California, United States
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want join us in these pursuits? Join us to help deliver the next groundbreaking Apple product! Apple’s Silicon Engineering Group (SEG) is hiring skilled engineers for CPU. As a CPU Clock Implementation Engineer, you will be driving the planning, design, implementation, and analysis of clock.
- The ideal candidate will have 5+ years of Physical Design, Analysis, and Verification experience on large processor and/or SOC designs.
- Knowledge of industrial standards and practices in Physical Design, Analysis, and Physical Verification.
- Experience in developing and implementing Powergrid and Clock specifications.
- Solid knowledge of Low Power Design, Physical construction, Spice, EM/IR-Drop/Noise, SIGEM analysis, Formal verification, Physical verification, and DFM.
- Strong communication skills.
- Proven understanding of CMOS circuit design.
- Layout design background is a plus.
- Working knowledge of Extraction and STA methodology and tools.
- Working knowledge of Computer Architecture.
- Solid understanding of scripting languages such as Perl/Tcl.
- Ability to work well in a team, problem solver and self-motivated.
As a Clock Implementation Engineer, you will participate in the following: • Work on clock planning, building simulation models and physical implementation. • Work on clock analysis. • Work on power grid methodologies and implementation. • Engage on physical design of blocks. • Scripting to automate tasks and improve efficiency.
Education & Experience
BSEE / MSEE is required.